A hybrid bypolar-mos trench gate semiconductor device

ABSTRACT

An improved MOS device is disclosed that utilizes a voltage configuration shorting the body and the gate, and independently biasing the source. As a result, the device functions as a trench MOS device with an NPN bipolar transistor in parallel therewith, permitting a smaller size device to perform the DC-DC conversion only previously possible with conventional unipolar devices.

This invention relates to semiconductors, and more particularly, to animproved device that reduces the on resistance of a semiconductordevice. The invention has particular applicability in trench-baseddevices, where the invention implements a parallel bipolar transistorwith the MOS device to decrease on resistance, or equivalentlysubstantially reduce the die size for the same level of totaldissipation.

Metal Oxide Semiconductor trench devices (“TrenchMOS”) devices are wellknown in the art. A key figure of merit for such MOS devices whenutilized to implement DC-DC converters is the size (area) of the devicethat is needed for a given total dissipation. In present state of theart, relatively large MOS devices are needed for a specified lowdissipation to implement power supplies for high-end microprocessors.

It is an object of the invention to provide a hybrid MOS device that canprovide a given dissipation at a significantly reduced size, thusresulting in a lower cost device.

It is also an object of the invention to provide a hybrid MOS devicethat can withstand high breakdown voltages, on the order of 200 volts.

The above and other problems of the prior art are overcome in accordancewith the present invention relating to an improved hybrid MOS device. Inaccordance with the invention, a trench MOS type device having eithersingle or multiple gate (field) oxide thicknesses is utilized in ahybrid mode, wherein one electrode is used for the gate and base, whichare shorted together, and another electrode is used as both the sourceof an MOS device and the emitter of a bipolar device. In essence, thedevice is biased to function as both an MOS device as well as a bipolardevice in parallel.

In a particular enhanced embodiment, the gate oxide thickness may bedifferent along different lengths of the silicon trench thereof, so thathigher breakdown voltages may be obtainable, and a more favorabletradeoff of specific-on resistance and total capacitance can beobtained.

FIG. 1 depicts a cross sectional diagram of one exemplary embodiment ofthe invention.

FIG. 1 shows an exemplary embodiment of the present invention. A typicaltrench MOS device 101 includes a gate 102 and an electrode 103 and 104.Unlike conventional MOS devices designed for DC-DC conversion, thesource region 106 and body region 110 are not shorted together andconnected by a single electrode. Instead, electrode 104 shorts the bodyand gate regions, 110 and 102 respectively, as shown.

By shorting together the gate region 102 and body region 110 withelectrode 104, and by correctly biasing the device as explained below,the source 106 will also serve as an emitter of a bipolar device, thebody 110 will also serve as the base of the bipolar device, and thedrain 105 will also serve as the collector of a bipolar device. Ineffect, by biasing the device correctly and causing a bipolar to deviceto be implemented within the MOS device, a hybrid device is achievedthat can provide a much higher current drive capability Viewedalternatively, a hybrid construction designed for the same dissipationas the pure MOS device will have a much smaller area, resulting reducedcosts.

As we now explain the operation of the device, we may use the termsbody, gate, drain and source to refer to the appropriate regions, withthe understanding that the regions double as the aforementioned regionsof the bipolar transistor when the device is biased appropriately. Inoperation, a positive voltage is applied to electrode 104, biasing thebody and gate regions 110 and 102 respectively. This creates a forwardbias at these regions, causing the source 103 to serve as an emitter,and the body 110 to serve as the base of a bipolar device. The collectoris denoted 105, the same region that serves as the drain of a bipolardevice. At appropriate voltage (base current) levels, the voltage on thegate of the MOS device exceeds the threshold voltage, resulting in theaddition of MOS current flow to the bipolar component.

This gate bias inverts the silicon on the mesa sidewall to form an MOSchannel. Current flows from source/emitter region 102 through thebase/body region 110 and along the trench sidewall 112. When currentflows, the current is made up of both holes and electrons, providing amuch higher current density and lowering on resistance with respect toconventional unipolar devices.

It is noted that the gate oxide thickness 114 adjacent to the Ndriftregion is thicker than the gate oxide thickness 115 that is adjacent tothe PI region. This thicker region 114 allows the device 101 to operateat higher breakdown voltages. For example, to operate up to 200 volts,region 114 would be approximately 10,000 A thick, while region 115 mightonly be 380 A. Alternatively, if the device were operated at lowervoltages (<30V), only one thickness of approximately 380-1000 A would beneeded. The thickness of the single-oxide device is generally determinedby a tradeoff in voltage handling, on-resistance, and capacitance.

It is noted that although the electrodes 103 and 104 are shown side byside, they may actually be staggered in the third dimension in and outof the page. Additionally, the trench structure can be stripe, square,circular, hexagonal or any other geometry without the loss of thefunction, as viewed from the surface of the wafer.

The gate can be fabricated in polysilicon or any deposited metal. Thefermi potential of the deposited gate can be used to adjust thethreshold voltage of the MOS device, independent of the body (base)doping level. It is noted however, that optimizing the doping within thePI region in order to provide a particular threshold voltage for the MOSgate could have the effect of degrading the performance of the bipolardevice. To avoid such a problem, and add an additional degree-of-freedomin device optimization, it may be desirable to form the gate electrodefrom _any deposited metal or refractory material (ie Al, Pt, Pd, TiW,silicides including CoSi2, TiSi2, etc), so that the bipolar transistorcan be optimized independently of the channel of the MOS device. In thismanner, the volume concentration of the base-body region can be selectedto optimize base-transport and emitter injection efficiency, whileminimizing effects on the threshold voltage and saturationcharacteristics of the MOS channel.

A double metal process flow is best for construction of the device tofacilitate dense interconnect of the base-gate and source-emittercontact regions; although a single metal process flow can be used.

The above describes the preferred embodiment of the invention, althoughvarious modifications and additions will be apparent to those of skillin the art.

1. A hybrid MOS-bipolar device comprising a trench MOS device having atleast source, gate, drain and body regions, the gate and base beingshorted together and biased positively relative to the drain.
 2. Thehybrid MOS-bipolar device of claim 1 wherein said gate has a singleoxide thickness of under 600 A.
 3. The hybrid MOS-bipolar device ofclaim 1 wherein said gate has a multiple oxide thickness for formationof gate and field-oxide regions.
 4. The hybrid MOS-bipolar device ofclaim 2 having a square trench geometry.
 5. The hybrid MOS-bipolardevice of claim 2 having a circular geometry.
 6. A method ofimplementing a hybrid MOS-bipolar device having a source, body and gate,comprising shorting together body and gate of a trench MOS device andpositively biasing the an electrode connected to the shorted body andgate.
 7. The method of claim 6 wherein the gate oxide thickness variesalong the length thereof.
 8. The method of claim 7 wherein the gateoxide thickness varies by having two substantially discrete levels ofthickness.
 9. The method of claim 8 wherein said device has a PI regionand an Ndrift region, and wherein a first gate oxide thickness isfabricated adjacent said PI region and a second and thicker gate oxidethickness is fabricated adjacent said Ndrift region.
 10. A hybridMOS-bipolar device comprising a PI region, an Ndrift region, a body,gate, drain and source, said device being configured with its base andgate shorted together, said device having a gate oxide thickness of afirst value adjacent said PI region, and a gate oxide thickness of asecond value adjacent said Ndrift region.
 11. The hybrid MOS bipolardevice of claim 10, wherein said gate and said body are positivelybiased.
 12. A method of making a hybrid MOS-bipolar device comprisingdoping a PI region to optimize said region for said MOS device, andfabricating a gate electrode from to optimize a bipolar component ofsaid hybrid MOS-bipolar device.
 13. The method of claim 12 furthercomprising making a gate oxide thickness that varies along the lengththereof.
 14. The method of claim 13 wherein said gate oxide thickness isgreater in a region adjacent said PI region than it is adjacent saidNdrift region.
 15. The method of claim 14 wherein said device isconstructed using a double metal process flow.
 16. A hybrid bipolar-MOSdevice having a first region serving as a source and emitter, a secondregion serving as a body and a base, and a third region serving as agate and base, the gate and base being shorted together and positivelybiased.
 17. The hybrid bipolar-MOS device of claim 16 having a fourthregion that serves as both a drain and a collector.
 18. The hybridbipolar-MOS device of claim 17 having a breakdown voltage ofapproximately 200 volts.
 19. The hybrid bipolar-MOS device of claim 17having a single gate oxide thickness of approximately 380-600 Angstoms.20. The hybrid bipolar-MOS device of claim 17 having plural gate oxidethicknesses.
 21. The hybrid MOS-bipolar device of claim 2 having astripe geometry.